Analysis of double-gate CMOS for double-pole four-throw RF switch design at 45-nm technology

Viranjay M. Srivastava, K. S. Yadav, G. Singh

    Research output: Contribution to journalArticlepeer-review

    28 Citations (SciVal)
    Original languageEnglish
    Pages (from-to)229-240
    Number of pages12
    JournalJournal of Computational Electronics
    Volume10
    Issue number1-2
    DOIs
    Publication statusPublished (VoR) - Jun 2011

    Keywords

    • 45-nm technology
    • Attenuation
    • CMOS switch
    • Double-gate MOSFET
    • DP4T switch
    • Radio frequency
    • RF switch
    • VLSI

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