Abstract
This paper presents a methodology for the automated generation of optimised system-level AHDL architectures from AHDL system-level specifications using a GA. The synthesis process begins with a set of randomly generated system-level topologies and model parameters. Genetic operators, selection, crossover and mutation, are applied to evolve the population of topologies to a population of system-level architectures in which topologies and model parameters meet the required performance specifications. Both topology and model parameters evolve simultaneously. Simulations are performed in the time domain with an AHDL behavioural model library of system-level building blocks. The integration and exploitation of AHDL simulation based design allows for an efficient and flexible system-level synthesis methodology with less dependency on a knowledge-based approach and complex design equations. The methodology has been successfully demonstrated for the design of a DSB-SC-AM demodulation chain, for which an optimised system-level AHDL architecture has been produced fulfilling the required input AHDL system-level specification.
Original language | English |
---|---|
Pages | 5/1-5/7 |
Number of pages | 7 |
DOIs | |
Publication status | Published (VoR) - 1997 |
Event | IEE Colloquium on Mixed-Signal AHDL/VHDL Modelling and Synthesis - IET London: Savoy Place, London, United Kingdom Duration: 19 Nov 1997 → 19 Nov 1997 Conference number: 1997/331 https://digital-library.theiet.org/content/conferences/1997/331;jsessionid=1k5krkmgua0lb.x-iet-live-01 |
Conference
Conference | IEE Colloquium on Mixed-Signal AHDL/VHDL Modelling and Synthesis |
---|---|
Country/Territory | United Kingdom |
City | London |
Period | 19/11/97 → 19/11/97 |
Internet address |