CMOS design of the tree arbiter element

Mark B. Josephs; Jelio T. Yantchev

doi:10.1109/92.544412

CMOS design of the tree arbiter element

Mark B. Josephs^*, Jelio T. Yantchev

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

27 Citations (Scopus)

Original language	English
Pages (from-to)	472-476
Number of pages	5
Journal	IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume	4
Issue number	4
DOIs	https://doi.org/10.1109/92.544412
Publication status	Published (VoR) - 1996

Funding

Manuscnpt received Febrnary 16, 1995. revised May 31, 1996 This work was supported by the European Commission under OM1 Project 6143 EXACT and Basic Research Workmg Group 7225 ACiD-WG as part of the ESPRIT Third Framework and by the United Kingdom Engineering and Physical Sciences Research Council under Grant GWH77736.

Keywords

Analog difference circuit
Arbiters
Asynchronous interaction
CMOS design
Flip-flop metastable region
Glitch phenomenon
Mutual exclusion element
Quick-return-linkage
Speed-independent circuit
Tree arbiter element

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10.1109/92.544412

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title = "CMOS design of the tree arbiter element",

keywords = "Analog difference circuit, Arbiters, Asynchronous interaction, CMOS design, Flip-flop metastable region, Glitch phenomenon, Mutual exclusion element, Quick-return-linkage, Speed-independent circuit, Tree arbiter element",

author = "Josephs, \{Mark B.\} and Yantchev, \{Jelio T.\}",

note = "Funding Information: Manuscnpt received Febrnary 16, 1995. revised May 31, 1996 This work was supported by the European Commission under OM1 Project 6143 EXACT and Basic Research Workmg Group 7225 ACiD-WG as part of the ESPRIT Third Framework and by the United Kingdom Engineering and Physical Sciences Research Council under Grant GWH77736.",

year = "1996",

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T1 - CMOS design of the tree arbiter element

AU - Josephs, Mark B.

AU - Yantchev, Jelio T.

N1 - Funding Information: Manuscnpt received Febrnary 16, 1995. revised May 31, 1996 This work was supported by the European Commission under OM1 Project 6143 EXACT and Basic Research Workmg Group 7225 ACiD-WG as part of the ESPRIT Third Framework and by the United Kingdom Engineering and Physical Sciences Research Council under Grant GWH77736.

PY - 1996

Y1 - 1996

KW - Analog difference circuit

KW - Arbiters

KW - Asynchronous interaction

KW - CMOS design

KW - Flip-flop metastable region

KW - Glitch phenomenon

KW - Mutual exclusion element

KW - Quick-return-linkage

KW - Speed-independent circuit

KW - Tree arbiter element

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U2 - 10.1109/92.544412

DO - 10.1109/92.544412

M3 - Article

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SN - 1063-8210

VL - 4

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JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

IS - 4

ER -

CMOS design of the tree arbiter element

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