Effect of Gate-lap and Oxide Material at 10-nm FinFET Device Performance

Shashi K. Dargar, Viranjay M. Srivastava

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    2 Citations (SciVal)
    Original languageEnglish
    Title of host publication2018 International Conference on Advanced Computation and Telecommunication, ICACAT 2018
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    ISBN (Electronic)9781538654729
    DOIs
    Publication statusPublished (VoR) - Dec 2018
    Event2018 International Conference on Advanced Computation and Telecommunication, ICACAT 2018 - Bhopal, India
    Duration: 28 Dec 201829 Dec 2018

    Publication series

    Name2018 International Conference on Advanced Computation and Telecommunication, ICACAT 2018

    Conference

    Conference2018 International Conference on Advanced Computation and Telecommunication, ICACAT 2018
    Country/TerritoryIndia
    CityBhopal
    Period28/12/1829/12/18

    Keywords

    • FinFET
    • Gate-lap lengths
    • Microelectronics
    • Short channel effects
    • VLSI

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