Modeling and design of asynchronous circuits

Mark B. Josephs; Steven M. Nowick; C. H. Van Kees Berkel

doi:10.1109/5.740017

Modeling and design of asynchronous circuits

Mark B. Josephs^*, Steven M. Nowick, C. H. Van Kees Berkel

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

33 Citations (Scopus)

Original language	English
Pages (from-to)	234-242
Number of pages	9
Journal	Proceedings of the IEEE
Volume	87
Issue number	2
DOIs	https://doi.org/10.1109/5.740017
Publication status	Published (VoR) - 1999

Funding

Manuscript received September 21, 1998. This work was supported by the European Commission under Working Group 21949 ACiD-WG as part of the ESPRIT Fourth Framework and by the National Science Foundation under Grants MIP-9501880 and CCR-97-31803. M. B. Josephs is with the Center for Concurrent Systems and VLSI, School of CISM, South Bank University, London SE1 0AA U.K. S. M. Nowick is with the Department of Computer Science, Columbia University, New York, NY 10027 USA. C. H. van Berkel is with Philips Research Laboratories, Eindhoven 5656 AA The Netherlands, and with Eindhoven University of Technology, Eindhoven 5600 MB The Netherlands. Publisher Item Identifier S 0018-9219(99)00879-8.

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@article{79734c623141469f8f576240efb26a81,

title = "Modeling and design of asynchronous circuits",

author = "Josephs, \{Mark B.\} and Nowick, \{Steven M.\} and \{Van Kees Berkel\}, \{C. H.\}",

note = "Funding Information: Manuscript received September 21, 1998. This work was supported by the European Commission under Working Group 21949 ACiD-WG as part of the ESPRIT Fourth Framework and by the National Science Foundation under Grants MIP-9501880 and CCR-97-31803. M. B. Josephs is with the Center for Concurrent Systems and VLSI, School of CISM, South Bank University, London SE1 0AA U.K. S. M. Nowick is with the Department of Computer Science, Columbia University, New York, NY 10027 USA. C. H. van Berkel is with Philips Research Laboratories, Eindhoven 5656 AA The Netherlands, and with Eindhoven University of Technology, Eindhoven 5600 MB The Netherlands. Publisher Item Identifier S 0018-9219(99)00879-8.",

year = "1999",

doi = "10.1109/5.740017",

language = "English",

volume = "87",

pages = "234--242",

journal = "Proceedings of the IEEE",

issn = "0018-9219",

publisher = "Institute of Electrical and Electronics Engineers",

number = "2",

}

TY - JOUR

T1 - Modeling and design of asynchronous circuits

AU - Josephs, Mark B.

AU - Nowick, Steven M.

AU - Van Kees Berkel, C. H.

N1 - Funding Information: Manuscript received September 21, 1998. This work was supported by the European Commission under Working Group 21949 ACiD-WG as part of the ESPRIT Fourth Framework and by the National Science Foundation under Grants MIP-9501880 and CCR-97-31803. M. B. Josephs is with the Center for Concurrent Systems and VLSI, School of CISM, South Bank University, London SE1 0AA U.K. S. M. Nowick is with the Department of Computer Science, Columbia University, New York, NY 10027 USA. C. H. van Berkel is with Philips Research Laboratories, Eindhoven 5656 AA The Netherlands, and with Eindhoven University of Technology, Eindhoven 5600 MB The Netherlands. Publisher Item Identifier S 0018-9219(99)00879-8.

PY - 1999

Y1 - 1999

UR - https://www.scopus.com/pages/publications/0033080328

UR - https://www.scopus.com/inward/citedby.url?scp=0033080328&partnerID=8YFLogxK

U2 - 10.1109/5.740017

DO - 10.1109/5.740017

M3 - Article

AN - SCOPUS:0033080328

SN - 0018-9219

VL - 87

SP - 234

EP - 242

JO - Proceedings of the IEEE

JF - Proceedings of the IEEE

IS - 2

ER -

Modeling and design of asynchronous circuits

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