Optimizing Accelerator on FPGA for Deep Convolutional Neural Networks

Yong Dong*, Wei Hu, Yonghao Wang, Qiang Jiao, Shuang Chen

*Corresponding author for this work

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    Original languageEnglish
    Title of host publicationAlgorithms and Architectures for Parallel Processing - 20th International Conference, ICA3PP 2020, Proceedings
    EditorsMeikang Qiu
    PublisherSpringer Science and Business Media Deutschland GmbH
    Pages97-110
    Number of pages14
    ISBN (Print)9783030602383
    DOIs
    Publication statusPublished (VoR) - 2020
    Event20th International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2020 - New York, United States
    Duration: 2 Oct 20204 Oct 2020

    Publication series

    NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
    Volume12453 LNCS
    ISSN (Print)0302-9743
    ISSN (Electronic)1611-3349

    Conference

    Conference20th International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2020
    Country/TerritoryUnited States
    CityNew York
    Period2/10/204/10/20

    Keywords

    • Convolutional neural networks
    • FPGA
    • Hardware acceleration

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